Modern computer workstation and server systems include multiple bank memory boards to provide flexibility in configuring dynamic random access memory (DRAM) capacity. Generally, a multiple bank memory board comprises rows of plug-in type connector elements adapted to mount and electrically connect individual plug-in memory elements such as single in-line memory modules, sometimes referred to as SIMM memory components. Each SIMM memory component comprises a plug-in board unit and includes a row or rows of DRAM memory elements mounted in-line on the board. The SIMM memory plug-in board is provided with a single connector designed to mate with one of the plug-in type connectors of the multiple bank memory to couple all of the DRAM's mounted on the SIMM to the memory board.
As is generally known, the multiple bank memory board includes on-board memory control electronics coupled to the plug-in type connectors of the board to control access to the DRAM's of the SIMM memory components plugged into the board, and to control the transfer of data to and from the DRAM's. The on-board memory control electronics is, in turn, adapted to be coupled to the memory management system of the workstation or server.
A user can selectively configure the total DRAM capacity of a workstation or server by plugging in a selected number of SIMM's that, together, provide the desired amount of memory capacity. To that end, SIMM components are commercially available in single-sided and double-sided configurations. In a single-sided SIMM, DRAM's are mounted on one side only of the SIMM plug-in board. In a double-sided SIMM, DRAM's are mounted on both sides of the SIMM plug-in board. Thus, a double-sided SIMM may be configured to have twice the memory capacity of a single-sided SIMM.
Commercially available multiple bank memory boards are designed to support both single-sided and double-sided SIMM's. The plug-in type connectors each define two rows of the memory board. A particular bit in a row address portion of a memory address designates which of the two rows assigned to the particular connector are to be accessed. In this manner, when a double-sided SIMM is plugged into the connector, the on-board memory control electronics can access the DRAM's of either side of the SIMM via the row designation bit for the two rows assigned to the individual plug-in type connector mounting the double-sided SIMM. When a single-sided SIMM is plugged into a plug-in type connector of the board, the second row of the connector is treated as being vacant. Thus, if two double-sided SIMM's are mounted on the memory board, the workstation or server can address memory locations of the DRAM's by selective reference to either one of rows 0, 1 for the first of the double-sided SIMM's, and rows 2 and 3 for the second of the double-sided SIMM's. However, if two single-sided SIMM's are mounted on the memory board, only rows 0 and 2 will be referenced, with rows 1 and 3 being treated as vacant.
Workstations and servers having multiple bank memory boards include a basic input/output system (BIOS) that polls the board at reset to determine the types of SIMM's mounted on the board. The information obtained by the BIOS is used by the memory management system of the workstation or server to control row selection. Thus, in the above example, when the double-sided SIMM's are mounted on the board, the BIOS determines the existence of the two sided configuration, and memory accesses are made with reference to rows 0, 1, 2 and 3. If, on the other hand, single-sided SIMM's are detected, the memory management system only utilizes rows 0 and 2 when accessing the DRAM's.
According to known DRAM operating characteristics, the DRAM must be repeatedly precharged to maintain electrical representations of the data stored in the DRAM. Precharge of a DRAM may increase memory access time during periods when repeated accesses are made to the same DRAM or row of DRAM's in the case of a SIMM arrangement. This is because memory address control signals are deasserted during precharge. Generally, during consecutive accesses to the same row of DRAM's, a precharge period is inserted between memory accesses to deassert memory control signals and precharge the DRAM's. This adds to the overall time for memory access operations.
A known technique for reducing memory access time is used in multiple bank memory board arrangements when double-sided SIMM's are mounted on the board. The memory address bit used to designate which of the two rows assigned to a particular plug-in type connector contains the DRAM being accessed is permutated to a memory address position that is toggled frequently. Thus, as memory accesses continue, there is a frequent change in the memory address bit designating the row, thereby causing a frequent change of the row where the DRAM to be accessed is located. Accordingly, the DRAM's of the row not being accessed may be precharged during the time of access to the DRAM's of the other row. It is therefore not necessary to wait for a precharge to be completed between certain successive pairs of access operations because row accesses are alternated on a frequent basis.
As should be understood, the technique for reducing memory access time used in configurations having double-sided SIMM's cannot be used when single-sided SIMM's are mounted in the multiple bank memory board. Thus, a series of accesses to DRAM's of the SIMM will include precharge periods interspersed between accesses. A need, therefore, exists for a technique for reducing memory access time when single-sided SIMM's are mounted in the multiple bank memory board.